python, Perl, System Verilog, DDR-IO verification, LPDDR JDEC specifications, Uvm, coverage driven verification methodology, LPDDR5

Shell, Python, Logging, Java, Incident Management, dependency management, Alerting, Release processes, Platform upgrades, Go, AI-driven agent-based automation frameworks, Resilience testing, Observability tooling, SRE frameworks, Chaos engineering, Self-healing systems, Monitoring, Error budgets, Production debugging, Linux-based production environments, Reliability reviews, CI/CD pipelines, System lifecycle operations, SLOs, On-call operations, tracing

Tcl Scripting, Verilog, System Verilog, Python, RTL fluency, UVM testbench, PCI-Express controller and protocol, HDL logic Design-Verification

Java, Apache Hadoop, Scala, Tensorflow, Pytorch, Spark, Python, LangChain, Hugging Face Transformers, TensorFlow Serving, Flink, NVIDIA Triton, TorchServe

Systems Programming, C, Shell script, Debugging Tools, Python, hardware accelerators, performance profiling, runtime environment

Verilog, Pcie, System Architecture, Ethernet, Scripting Languages, Python, RTL implementation, system-verilog, system-verilog based verification, on-board components, synthesis timing closure, clock management, AMBA protocols, Digital Design, multiple clock domains, CPU IP Integration, wireless communication design, APB, emulator tool chains, asynchronous interfaces, AXI4