About Solutions SoC Engineering

Join the Solutions SoC Engineering organization and help shape the future of silicon. We are building a world-class engineering organization focused on delivering innovative, high-performance, and energy-efficient silicon solutions. As a rapidly growing global team, we bring together expertise across architecture, design, verification, emulation, FPGA, software, and post-silicon validation to deliver first-time-right silicon using advanced methodologies, automation, and AI-driven tools. Our culture is built on technical excellence, ownership, collaboration, and continuous learning.

Role Overview

As a Subsystem Design Verification Engineer, you will verify complex subsystems that form the foundation of next-generation Arm-based platforms. You will develop reusable verification solutions and drive verification from planning through closure.

Key Responsibilities

Develop and execute verification strategies for subsystem-level designs and IP integration.
Verify subsystem functionality including interconnects, memory interfaces, peripherals, power management, and software-visible features.
Validate subsystem functionality under functional, integration, stress, and performance scenarios.
Own verification deliverables from planning through verification closure while ensuring quality, schedule, and execution commitments are met.
Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation.
Develop verification plans, test methodologies, test cases, and coverage closure strategies.
Drive functional, code, toggle, assertion, and coverage closure.
Debug RTL, testbench, integration, and system-level issues.
Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
Leverage automation, scripting, and AI-assisted workflows to improve verification productivity.
Contribute to methodology improvements, documentation, and engineering best practices.

Required Skills and Qualifications

Bachelor's or Master's degree in a relevant engineering discipline.
4–9 years of experience in IP or subsystem verification.
Strong knowledge of Verilog, SystemVerilog, UVM, and modern verification methodologies.
Understanding of subsystem architecture, integration, AMBA protocols, memory hierarchy, and verification flows.
Experience with C/C++, scripting, coverage closure, and RTL/testbench debugging.
Excellent analytical, communication, and collaboration skills.

Desired Skills and Qualifications

Experience verifying multimedia, security, PCIe, networking, storage, or memory subsystems.
Knowledge of Arm architecture and AMBA protocols.
Experience with UPF, formal verification, emulation, FPGA, or gate-level simulation.
Experience developing reusable verification IPs and automation frameworks.
AI-assisted verification experience.

Our 10x Mindset

At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: https://careers.arm.com/10x-mindset

Use of AI in Your Application

At Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application, and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact [HIDDEN TEXT] so we can support you.

Recruitment Adjustments and Accommodations

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [HIDDEN TEXT] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed to the extent necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working

Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Senior Subsystem Design Verification Engineer