test validation , Schematic Design, Transmitter Design, RF Transceiver Design, VGA Design, ADC Design, PLL Clock System Design, Tape Out, Layout Design

Python Scripting, VCO, Charge pump, PLL Loop Dynamics, Loop filter, Analog Circuit Design, PI Deserializer, Pfd, DCO, adexl, TDC, virtuoso, Bias Reference, Sampler, LDO, TX and RX Equalizer, SPICE simulators

bandgap references , PLLs, mixed-signal architectures, post-layout verification, DC-DC converters, BCD processes, Bias Circuits, Comparators, SAR ADCs, corner analysis, LDOs, noise mismatch stability analysis, Voltage References, parasitic effects, matching common-centroid structures, Oscillators, feedback systems, layout concepts, Spectre, Monte Carlo simulations, Analog Mixed-Signal IC Design, Buck regulators, analog floorplanning, Cadence Virtuoso, low-power design techniques

MATLAB, Python, AMS simulation flows, AMS verification environments, DAC architectures, biasing circuits, Spectre, DFT hooks, wreal, linearity measurement, Monte Carlo noise analysis, mixed signal IC design, corner analysis, precision references, Transistor Level Design, Cadence Virtuoso, Verilog-A

DFE, Duty Cycle Correction, BGR, Oscillators, High-speed clock distribution, Rx CDR, Tx Serializer Output Driver, CTLE, Generic Analog Circuits, Analog Circuit Design, EDA Tools, Bias Circuits, Deserializer, Circuit design simulation and analysis, LDO, Lower Nodes Experience, Amplifiers, VGA, Comparators, Power Management Circuits, High-Speed SerDes Tx and Rx blocks

Cadence Virtuoso, Mixed-Signal IC Design, High-Speed ADC Design, Analog IC Design

UNIX, signals systems and transforms, MOS transistors, Analog Circuit Design, layout tradeoffs, layout verification tools, device physics, High Volume Manufacturing, feedback systems, Mixed Signal Design, AC DC analysis, circuit simulation tools, CMOS Bi-CMOS fabrication processes, poles zeros compensation, loop dynamics, Modeling Tools, end-to-end design flow

CMOS BCD Analog Circuits, power management, Design Reviews, Mass production test plan, Quality assurance test plan

Cadence Virtuoso, analog and mixed-signal circuit design, high-speed analog architectures, Signal Integrity, jitter, Spectre, advanced CMOS technology nodes