HDL - Verilog, Logic Design, Tcl, shell scripting, System Verilog, Perl, Synthesis, EDA Tools, Genus Synthesis Solution, low power design, Cadence Tools, Physical Design, formal verification, Timing Closure

HDL - Verilog, Logic Design, shell scripting, Tcl, System Verilog, EDA Tools, Synthesis, Genus Synthesis Solution, low power design, Cadence Tools, Physical Design, Automation skills using Perl, formal verification, Timing Closure

Requirements Management Risk Assessment and Root Cause Analysis, Agile and Hybrid Product Development Methodologies, PCB Design Hardware Validation and Debugging, System Architecture and Systems Engineering, IoT Industrial Automation Smart Connected Products, Embedded Systems and Microcontroller-based Architectures, Electrical Systems Integration, Product Lifecycle Management and Engineering Change Processes, Analog Digital and Mixed-Signal Electronics, Wireless Technologies Wi-Fi Bluetooth Zigbee LoRa Cellular, Power Electronics and Control Systems, Electronics Hardware Design and Development, Communication Protocols UART SPI I2C CAN Modbus Ethernet USB, Firmware and Software-Hardware Interface Design, Signal Integrity EMC EMI Reliability and Safety Engineering

System Design, framework architecture, business application prototypes, technical platforms, software compatibility, system interfaces

Sql, Firmware, BIOS, Python, Software Applications, Perl, Computer Architecture, Circuit Analysis, Jmp, operating-system behavior, silicon bring-up, critical-path analysis, Drivers, process technology, Digital Design, performance-per-watt analysis, transistor device physics

Kibana, Curl, Apis, Networking Concepts, Json, Dns, Debugging Tools, Firewalls, Postman, Voice SIP protocols, latency, cloud platforms, HTTP methods, VSIP, ports, webhooks, SIP call flows