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Showing 5 jobs
Skills:
Verification methodologies such as UVM, Understanding of StarRC Calibre parasitic extraction flow, NAND Flash memory design, Test Bench development in System Verilog
Skills:
C, coverage closure, microprocessor ISA, coverage planning, Data-Consistency verification, power management verification, testbench development, clocking reset power-up sequences, low power verification flows, systemverilog
Skills:
C, coverage closure, microprocessor ISA, coverage planning, Data-Consistency verification, power management verification, testbench development, clocking reset power-up sequences, low power verification flows, systemverilog
Skills:
C, coverage closure, coverage planning, Data-Consistency verification, power management verification, testbench development, clocking reset power-up sequences, low power verification flows, systemverilog
Skills:
System Verilog, Ovm, FPGA prototyping, Uvm, Pre Silicon Validation Verification, FPGA architecture, constrained random verification methodologies
