boundary scan , Jtag, memory BIST, Uvm, systemverilog, SSN, PLL testing, compressed scan, Dft, DV, Phy Loopback, formal verification methods, agentic AI flows

memory controllers , Python, performance analysis and modeling, architecture and micro-architecture design, arithmetic units, memory hierarchy, DSP processors, accelerators, Ethernet ROCE UAL NVlink, Low Precision Mixed Precision Numerics, high performance and low power design techniques, bus architectures, Vector processors, ML tools