Perl, System Verilog, Python, NVIDIA custom compilers and tools, formal verification, Coverage metrics, Profiling Tools, SV constraint random verification, Uvm, X prop

rtl verification , Pcie, Nvme, systemverilog, Uvm, Axi, AHB, Asic verification

Verilog, Vcs, C Programming, automation, System Verilog, Computer Architecture concepts, UVM methodology, Questa, Assembly Programming, HVL, low-level debug

Verilog, Oops Concepts, scripting and tool development using Perl, VCS or equivalent simulation tools, debug tools like Debussy GDB, VMM, Uvm, computer architecture concepts, systemverilog

Usb, Vcs, DDR, Pcie, Perl, Ethernet, Shell scripting, Python, Tcl, Xcelium, Uvm, systemverilog, Questa

cache coherency , Perl, Python, Cache, ACE protocols, C-based testbench development, systemverilog, AMBA, Axi, ISA verification, Memory Subsystems, ARM processor architecture