Fpga, C, C++, Python, Verilog RTL coding, ESD Latchup HTOL tests, Analyzers, Oscilloscopes, Debug skills, Physical Layer and Protocol layer experience, Bit Error Rate Testers, Ethernet PCIe UCIe standards and Protocols, Electrical and Protocol Interoperability and Compliance test suites, Protocol Exercisers

Fpga, C, Pcie, Ethernet, Python, Test result analysis, Verilog RTL coding, ESD Latchup HTOL tests, Analyzers, Oscilloscopes, Peripheral chips, High speed SERDES, High speed interface design techniques, UCIe, Debug skills, Lab automation scripts, Schematic and layout level, Bit Error Rate Testers, CXL, Electrical and Protocol Interoperability and Compliance test suites, Protocol Exercisers, Post-Silicon PHY Systems Interop and Compliance testing, Signal and Power integrity checks