C, Gdb, Gcc, Eclipse, Zephyr, Gnu Make, JIRA, Git, Confluence, Python, DC to AC inverters, closed-loop control algorithms, AC grid simulators, STM32, Atlassian cloud suite, UL and IEC standards, drivers for sensors, bootloader design and implementation

Git, Freertos, Gerrit, Qnx, SMMU, Isp, Camera frameworks, Performance optimization tools, Virtualization approaches, QNX Hypervisor

Perl, Python, Formal Verification methodologies, Axi, APB, JasperGold, AMBA protocols, VC Formal, Uvm, AHB, systemverilog

Perl, Python, Tcl, VPlan, Synopsys VCS, Synopsys VC Formal, JasperGold, Cadence simulation tools, AMBA protocols, Uvm, systemverilog

C, Pcie, Ethernet, SV, CXL, Uvm, UCIe, systemverilog

DFT architecture, coverage analysis, Memory-BIST, ATPG pattern generation, compression at core level, Scan Insertion, SSN architecture, clock architecture, timing simulations, no-timing simulations, occ