Gpu, Soc Architecture, Vehicle computers, interconnect, SERDES, SDVs, Automotive high performance SOCs, MCUs, NPU, Imaging, Debug, Clocking and reset architecture

memory controllers , Verilog, Flash, Test Planning, C, Vcs, Debugging, DDR, NCSim, ARM cores, Sram, memory subsystems, systemverilog, microcontroller architectures, testbench architecture development, SVA, AHB, assertions, regression management, Axi, Questa, functional performance validation, Uvm, interconnect protocols, verification closure, feature traceability, AMBA, Modelsim, VHDL, functional coverage