stylus , Tcl Scripting, Physical Design, LEC closure, VCLP analysis, Conformal VCLP, RTL synthesis, Synopsys Fusion Compiler, UPF development, Cadence Genus

Soc, Scripting Languages, LVS, power plan, UPF, Place Route, Tweaker, PrimeClosure, Cadence Tools, STA flow methodology, ESD analysis, Floor plan, primetime, Tempus, IP level Synthesis, analog digital interface, formal verification, ERC, IO ring, DRC