Silicon Validation, control-loop stability, data converters, signal-conditioning blocks, Sensors, analog feedback loops, charge pumps, mixed-signal IC development, switching converters, Verification, power management, Analog Design, LDOs

Static timing analysis, Soc, Verilog, quality assurance, AHB, Timing Constraints, LINT, systemverilog, Design Verification, cdc, Logic Synthesis, ASIC, physical implementation, AXI Stream, low power design, formal equivalence, APB, Dft, power analysis

Python, PERL, Debugging, Silicon Validation, analog simulation, silicon bring-up, Analog Circuit Design, noise analysis, stability and compensation, CMOS technology, device mismatch and variation, virtuoso