AI Compiler Engineer-Staff/Principal

Locations: Bangalore (Hybrid) /Remote

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Responsibilities

Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization.
Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges.
Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations.
Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR).
Implement parsing, semantic analysis, and IR generation for deep learning frameworks.
Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers.
Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations.

Qualifications

Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related field (Ph.D. preferred).
7-10 years in compiler development, with a strong focus on AI or ML graph compilers.
Proficiency in AI graph compiler frameworks (e.g., MLIR, Torch-FX)
Solid background in hardware architectures (e.g., GPUs, TPUs, ASICs) and optimization techniques such as fusion, quantization, and tiling.
Familiarity with neural networks operators and code generation.
Strong understanding of intermediate representations, code parsing, and semantic analysis in compiler design.
Proficiency in C++, Python, or other programming languages commonly used in compiler development.
Open-source contributions to AI software frameworks and libraries is a plus
Demonstrated experience leading and mentoring engineering teams with successful project delivery

Contact:

Uday

Mulya Technologies

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Staff AI Compiler Engineer