Soc Architecture, Tcl, Python, Perl, HDLs, MBIST, ATPG flow implementation, UPF, Cadence digital implementation tools, DFT architecture definition, Tempus, CPF, Scan, Genus, tessent DFT, JTAG boundary scan

automatic test pattern generation , bist , C, C++, FPGA Design, Verilog, IC layouts, scripting languages for test automation, test data compression, VHDL, ATPG, scan testing