Perl, Shell scripting, DFT verification, Synopsys Tetramax DFTMAX, VCS simulation tool, IEEE1500, Scan memory BIST, Verilog RTL design, JTAG 1149.x, Design for Test methodologies, Mentor testkompress

Static timing analysis, Perl, Python, Tcl, DFx methodologies, ASIC DFX, Design Compiler, BSCAN, MBIST, DFX Design Architect, SSN, Timing Closure, Synthesis, spyglass, DFT implementation, Tessent, ATPG, Scan, TestKompress, IJTAG