DDR, Pcie, Perl, Ethernet, Python, Design Verification, Uvm, emulation environments, RTL Verilog, HBM, SoC IP, high-speed protocols, AI ML SoCs

Verilog, Python, Pcie, Perl, spyglass, VHDL, DDR memory controllers, CXL

Spi, DDR, characterization methodology, LVTTL, under voltage tolerant circuits, IO Design, Esd, LU concepts, Oscillator, LVCMOS, LVDS, xSPI