Uart, Spi, FPGA Design, Hdl Languages, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Unix system, Otn, Uvm, Microsemi FPGAs, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

Uart, Spi, Hdl Languages, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Unix system, Otn, Microsemi FPGAs, Uvm, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

Uart, Spi, Hdl Languages, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Unix system, Otn, Microsemi FPGAs, Uvm, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

battery management systems , altium , M.2, KiCad, Wi-Fi 6E, eagle, PCIe Gen4, ASRock, Intel NUC, VersaLogic, LoRa, 5G NR, power delivery networks, USB 4, x86 SBC architectures

Uart, Orcad, Can, Spi, Validation Testing, Debugging, I2c, Dfm, Pcb Design, safety-critical automotive hardware development, Altium Designer, component selection, isolation designs, Schematics, automotive safety and reliability standards, homologation testing, AIS004, hardware bring-up, ISO 26262, DFA, Dfmea, Power Electronics, AIS156, AIS038, buck-boost converters, digital circuit design, LDOs

Unix, Uart, Spi, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Otn, Uvm, Microsemi FPGAs, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

Spi, Uart, Usb, Jtag, Sata, Protocol analyzers, Pcb Design, DDR5 LPDDR memory subsystems, AI-Enabled engineering, SoCs, Power management circuits, FPGAs, Hardware Design, Signal Integrity, Debug methodologies, I²C, Oscilloscopes, PCIe Gen4 5, System architecture design

python, perl, Data Analysis, silicon design, Debug, System Validation, Hardware Design