System Verilog, MPHY, UFS, Unipro, Asic verification, Uvm

C, Uart, Bash, Spi, DDR, Pcie, Perl, Verilog, I2c, Python, System Verilog, Tcl, i2s, DFX Verification, Uvm, Axi, APB, AHB

Verilog, System Verilog, Asic verification, Uvm, cpu design, DDR4, Memory

System Verilog, Building test benches from scratch, Data path verification performance tests, Gate level simulation, ASIC verification using UVM, formal verification

System Verilog, Building test benches from scratch, ASIC verification using UVM

Shell, Pcie, Perl, Arm, Python, Tcl, MCU, AMBA, Axi, UCIe, systemverilog

Tcp, Pcie, Ethernet, System Verilog, RDMA, Data path verification performance tests, Building test benches from scratch, Palladium, Zebu, Veloce, ASIC verification using UVM, HAPS, formal verification

Tcl, Verilog, C, Python, Perl, Uvm, Zebu, Emulation, systemverilog, Palladium, Hybrid Simulation, Veloce