Perl, Python, Tcl, Pcie, Cadence Xcelium, Uvm, systemverilog, Synopsys VCS, AMBA AXI, CPF, UPF

rtl verification , Pcie, Nvme, systemverilog, Uvm, Axi, AHB, Asic verification

C++, Soc, Communication engineering, Simulation, Asic verification, Uvm

UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), C, C++, Shell, Pcie, Perl, Arm, Python, Tcl, Systemc, MCU, Hardware Emulation Platforms, RISC-V, UCIe, systemverilog, Verification Methodology, AMBA, Axi, Formal Model Equivalence Checking Tools, formal verification, VC Formal

C, Uart, Bash, Spi, DDR, Perl, Pcie, Verilog, I2c, Python, System Verilog, Tcl, i2s, DFX Verification, Uvm, Axi, APB, AHB

Tcl, C, Perl, Verilog, Python, Emulation, Zebu, Veloce, Palladium, Hybrid Simulation, Uvm, systemverilog

System Verilog, Tcp, Pcie, Ethernet, Building test benches from scratch, ASIC verification using UVM, Gate Level Simulations, Forwarding logic Parsers P4, RDMA, Zebu, Veloce, Palladium, HAPS, formal verification