Unix, C, Linux, Perl, Python, System Verilog, Tcl, Mixed Signal Design, EDA design flow and tools, Cadence CAD Tools

Unix, C, Linux, Perl, System Verilog, Python, Tcl, Mixed Signal Design, EDA design flow and tools, Cadence CAD Tools

Uart, Usb, Embedded C, Orcad, Ble, Rs232, Ethernet, Can, Spi, I2c, Python, Zigbee, eagle, Altium Designer, 32-bit MCUs, PCB Design Tools, Fusion 360, Design for Manufacturability, KiCad, LoRaWAN, Wi-Fi, Automation hardware platforms, EMI EMC compliance, Linux Single Board Computers, Rs485, Industrial IoT

Python, Restful Apis, Cloud Services, Documentation, messaging systems, Innovation

Python, Gis, PLS-TOWER, Overhead transmission line design, PLS-CADD, PLS-POLE, Autocad, Structural load analysis, Tower spotting optimization

Clp, Shell scripting, Python, Perl, Tcl, Design Compiler, primetime, retention cells, Conformal, Tempus, UPF, power switches, Cadence Genus, Physical and low power aware synthesis using Synopsys Fusion Compiler, UPF-based low-power architectures, level shifters, Pre-STA analysis, SDC constraints, Formality, isolation cells, automation and flow improvements using AI agents, Timing Closure, low-power methodologies, Conformal ECO, multi-voltage designs

rtl verification , Clearcase, Ovm, Tcl, Verilog, Arm, System Verilog, Perforce, Python, Perl, Uvm, UPF, AMBA, RISCV, AHB, CPF, APB, Axi