power system studies , MATLAB, Technical Specifications, Protection and control philosophies, PVSys, PSCAD, Earthing and lightning protection systems, UPS DC systems, Generators, Lighting system layouts, BESS electrical equipment, HOMER, Electrical cables, Control Architecture, PSSE, SCADA system, SKM, Transformers, GIS system, Protection relays, BESS integration, Etap, Electrical Systems

Testing, software verification, software validation

Pcie, Verilog, Ethernet, Prototyping, Python, Scripting, Tcl, UCIe chiplet interconnects, AI tools, cdc, area optimization, Emulation, systemverilog, high-speed IO protocols, Rtl Design, formal verification, RDC, LINT, Timing Closure, silicon bring-up, CXL, micro-architecture, power efficiency

static timing analysis, Python, Verilog RTL, Genus Design Compiler, scripting or programming languages, DFT methodologies, high-speed SerDes, ASIC synthesis, Asic Physical Design, physical verification DRC LVS, 3DIC implementation methodologies, Cadence Virtuoso, RTL Compiler, place-and-route Encounter Innovus ICC, Clock Tree Synthesis

System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools

kernel drivers , Soc Architecture, Tensorflow, Pytorch, Linux, Embedded AI software stacks, System observability, Neural network acceleration, IREE, AI compiler infrastructure, Open-source software development, TVM, MLIR-based toolchains, power management, TFLite, Memory hierarchies, RISCV AI Hardware architecture, Developer tooling, AI SDK, Automated testing frameworks

arinc 653 , arinc 429 , Embedded Software Development, Requirements Engineering, AFDX, ARP4754A, verification methodologies, ARINC 615A, DO-178, aerospace software certification standards, software verification and validation strategies, avionics communication protocols, software lifecycle processes

System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools

synopsys primetime , Perl, Python, Tweaker, Power-Aware Verification UPF, Cadence CCD, Sign-off STA Synopsys PrimeTime PT PT-PX, Cadence Conformal LEC, PrimeClosure, Cadence Tempus, Synopsys Formality, Formal Verification LEC, Constraints Validation Synopsys TCM GCA Ausdia TimeVision SpyGlass, Timing Closure ECO Cadence Tempus