arm architecture , RIS tools, verification methodologies, CPU verification, AI accelerated workflows

Shell, Perl, Debugging Tools, Python, verification methodologies, ASIC SOC verification, CPU GPU architecture or verification, Uvm, systemverilog

C, Verilog, automation, Scripting, RTL testbench debugging, memory hierarchy, Uvm, systemverilog, Arm CPU architecture, coverage closure, coherency protocols, subsystem integration, interrupts

hardware engineering , C, Jtag, Verilog, Scripting Languages, System Verilog, debug and triage failures, IEEE1500, HDLs, memory dump, MBIST, scan dump, formal verification methodologies, CPU micro-architectures, CPU architectures, power management features, testbench components

Shell, Perl, Vcs, Python, Xcelium, Questa, CPU Processor verification, Uvm, systemverilog, SVA

Vcs, Verilog, Scripting Languages, Debug, verification methodologies, Simulation, Uvm, coverage infrastructure tools, VHDL, stimulus checking, NC, Verilator