static timing analysis, Python, Verilog RTL, Genus Design Compiler, scripting or programming languages, DFT methodologies, high-speed SerDes, ASIC synthesis, Asic Physical Design, physical verification DRC LVS, 3DIC implementation methodologies, Cadence Virtuoso, RTL Compiler, place-and-route Encounter Innovus ICC, Clock Tree Synthesis

Rtos, Device Drivers, Linux kernel, Exception Handling, trusted firmware, Caches, CPU Microarchitecture Knowledge, bring-up and debugging skills, ARM v8 v9 architecture, MMU, hypervisors, interrupts, debug subsystems, Low-level firmware and architecture-specific code

Python, MATLAB, data analysis and visualization tools, R, static and dynamic passenger modelling, passenger behavior simulation models, Excel with VBA, Viswalk, Legion, MassMotion, CAST

Requirements Management, Embedded Software, Iso 13485, Risk Management, Iso 14971, fmeca, Configuration Control, Verification Planning, Fmea, IEC 60601, IEC 62304

Software Engineering, authentication traffic admission, declarative configuration engines, third-party integrations, schema compiler systems, OAuth credential management, gateway edge systems

containerization , Java, Golang, Distributed Systems, Python, next-generation databases, orchestration using Kubernetes, developer tools, DevOps practices, cloud-native applications, CI CD, event-driven programming paradigms, Managed Services, infrastructure as code

Unix Shell Scripting, perl, Static Timing Analysis, Tcl, ASIC digital implementation flows, Tempus, GAA technologies 2nm and below, Voltus, Innovus, Digital Genus, EMIR, EDA Tools, FinFet nodes 7nm and below, Digital Design Flows

PostgreSQL, Microservices, FastAPI, Asynchronous programming, Python, LangChain, model observability solutions, high-performance API design, scalable data platforms, multi-agent architectures, workflow orchestration, event-driven systems, artificial intelligence concepts, LangGraph, prompt optimization pipelines, state management solutions, AI-driven decisioning systems, context-engineering frameworks, production deployment of LLM-powered applications, secure multi-tenant architectures

logic bist , Usb, Perl, Pcie, Shell scripting, Static Timing Analysis, Python, Tcl, Memory BIST, Mentor, Cadence, IEEE 1149.1 JTAG, IEEE 1500, Analog Mixed-Signal test structures, DFT architecture, ATPG, EDA Tools, IEEE 1687 IJTAG, Siemens, Synopsys