Vcs, ATE patterns, Scan Insertion, JTAG protocols, ATPG, Gate level simulation, Post-silicon validation, Tessent tool sets, P1687, TestMax, TetraMax

Vcs, Scan Insertion, ATE patterns, JTAG protocols, ATPG, Post-silicon validation, Tessent tool sets, P1687, TestMax, TetraMax, Gate level simulation debugging