Sed, Jtag, Awk, Tcl, MBIST, gate-level simulation, Spyglass-DFT, Dft, Tessent, ATPG, Scan, LBIST

Sed, Jtag, Awk, Tcl, debug skills, MBIST, gate-level simulation, Spyglass-DFT, test cost reduction analysis, Dft, ATPG, scan-stitching, Scan, scripting skills, LBIST, Tessent flow, post silicon support

Unix, Linux Os, Verilog, Tcl, Ruby, Jtag, Python, Perl, Scripting Languages, SV, MBIST, IO-PHY loopback testing, systemverilog, DFT feature verification, file version control, EDA simulation tools, Cadence NCSIM, UVM verification methodologies, Verdi, SVA, Synopsys VCS, fuse, Scan, debug tools

logic bist , C, Jtag, Perl, Verilog, Python, Tcl, PDT, Scan and Memory Diagnosis, Memory BIST and Repair implementation, IEEE1687, ATPG Fault models, BSCAN, Scan Codec insertion, IEEE1149.1, SDF annotated gate level verification, VHDL, Fault Simulation, SDD, ATPG, TDF, SAF