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India

Skills:

logic bist Scan InsertionFinFET nodesBoundary scan IEEE 1149.1Transition Path DelayMBISTSynopsys TestMAXScan compressionSiemens Mentor TessentDFT architectureATPGCadence ModusStuck-at

Early Applicant
Bengaluru, India

Skills:

logic bist UsbPerlPcieShell scriptingStatic Timing AnalysisPythonTclMemory BISTMentorCadenceIEEE 1149.1 JTAGIEEE 1500Analog Mixed-Signal test structuresDFT architectureATPGEDA ToolsIEEE 1687 IJTAGSiemensSynopsys

Early Applicant
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