Pcie, Ethernet, protocol VIP integration, Mentor, Cadence, Uvm, systemverilog, advanced verification methodologies, Register modeling, PAM2, Avery, D2D, PAM4, Synopsys

System Verilog, Debug, SoC Verification, Emulation, Simulation, assertion coverage, testbench development, Uvm

perl, Pcie, Vcs, Verilog, Ethernet, I2c, Spi, System Verilog, MTI, NC, Uvm

formal verification, property checking, Uvm, systemverilog, testbench infrastructure

Hmc, Arm, Ethernet, Pcie, DDR, Functional Safety verification, formal verification, Assertions, UCIe, Uvm, Security verification, systemverilog, Emulation, coverage-driven verification, SoC Verification, AI-assisted verification, RISC-V, Portable Stimulus PSS, Zebu, HBM, Palladium, Hardware software co-verification, Veloce

Machine Learning, Sql, Deep Learning, Nlp, Python, efficient deployment of Large Language Models, Ai, LLM Optimization, prompt engineering, Gen AI, R, Graph Neural Networks

.NET, Debuggers, Angularjs, Design Patterns, Memcached, Wpf, Pl-sql, MySQL, Php, Oracle, Python, AWS, Mongo, Version Control, Soap, Http, Mssql, Redis, Web Services, Reactjs, Rest Apis, Azure, NoSQL databases, profilers

Unix, Fhrp, C, Eigrp, BGP, Linux, Perl, Rip, Python, OSPF, IS-IS, BGP-LS

Shell, Pcie, Perl, Arm, Python, Tcl, MCU, AMBA, Axi, UCIe, systemverilog