Sed, PERL, Awk, Tcl, ADE, automation using shell scripting, MSEE, Cadence Virtuoso Schematic Capture, LVS, analog circuit modeling, designing mixed signal circuits, AMS methodology, DRC

LINT, chip design flow, cdc, Memory BIST, verification processes, Synthesis design for testing, UPF, Physical Design, RDC, ATPG, ASIC design methodologies, chip architecture design methodologies, Low Power Optimization Estimation

C, Tcl, Python, Perl, PrimeSim, LVS, CMOS design, Spectre, ADE, high-speed analog design, Custom Compiler, post-layout extraction, Cadence Virtuoso, DRC, Hspice, Circuit Simulation