production yield targets, transistor-level design, block-level modeling, SPICE Spectre simulation, mixed-signal IC design for mobile applications, advanced packaging, top-level simulation, IC physical layout management, Cadence CAD toolset, BCD process technologies, analog mixed-signal IC design, VHDL co-simulation, system-level verification, semiconductor IC processing, hand analysis, production test solutions, IC system partitioning, top-down IC design methodologies, signal chain analysis, architectural trade-off analysis