hardware bring up , Spi, Pcie, I2c, design tools including Cadence Concept, Ethernet high speed SERDES 25G interfaces, design validation, X86 architecture, SSD memory devices, MDIO, DDR5, Cadence Allegro

Uart, Spi, Hdl Languages, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Unix system, Otn, Microsemi FPGAs, Uvm, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

Testing, High Speed layout, Intel Embedded Processors, High-speed PCB layout techniques, Signal power integrity, FPGA programming skills VHDL, Hardware design development, Schematic tools Orcad

Unix, Uart, Spi, Pcie, Verilog, I2c, System Verilog, Ethernet based protocols, Otn, Uvm, Microsemi FPGAs, quartus, VHDL, Vivado, VMM, AXI memory controllers, Libero

Spi, Uart, Usb, Jtag, Sata, Protocol analyzers, Pcb Design, DDR5 LPDDR memory subsystems, AI-Enabled engineering, SoCs, Power management circuits, FPGAs, Hardware Design, Signal Integrity, Debug methodologies, I²C, Oscilloscopes, PCIe Gen4 5, System architecture design

boundary scan , Jtag, SSN, Uvm, DV, PLL testing, compressed scan, systemverilog, agentic AI flows, Phy Loopback, Dft, memory BIST

Sata, Usb, PCIe business analyzers, Jtag debuggers, Signal Integrity, PLD, x86 CPU architecture, high speed digital design, switching power supplies, schematics capture, Pcb Layout