Physical Design, DFT Implementation, Layout Extraction, Rtl Design

, Tcl, Perl, Fc, Routing, Python, Scripting, Synthesis, LEC, EDA Tools, Calibre, floorplanning, EMIR, ICV, Tempus, Placement, ERC, DRC, Power Planning, Genus, power analysis, Dc, LVS, Pt, pegasus, Physical Verification, Innovus, ICC2, formal verification

static timing analysis, routing, Innovus, LVS, Parasitic Extraction, Fusion Compiler, DRC, Placement, floorplanning, Clock Tree Synthesis, ICC2

Mentor-Calibre, pegasus, RTL handoff to GDSII, Cadence Innovus, LVS, Voltus, Physical Verification, Signal Power Integrity, DRC, EM IR drop analysis, Static Dynamic IR analysis, PERC resistance checks

AI ML concepts, physical design tools such as Synopsys Fusion Compiler, scripting and automation using Python