transistor-level design and simulation, PEX, post-layout verification, LVS, noise analysis, Analog Circuit Design, Spectre, advanced CMOS technology nodes, DRC, layout sensitivity, linearity matching, mixed-signal IC design, Cadence Virtuoso

Scripting, Automation Tools, Verilog, Python, Perl, Automotive qualification, Uvm, Analog Circuit Design, systemverilog, DACs, ADC, Cadence, Formal verification methodologies, Op-Amps, ISO26262, Comparators

network theory , Networks, Stability, RLC Circuits, MOS Small and large signal analysis, RLC time and frequency domain analysis, Amplifiers, Circuit Analysis, Analog Circuit Design, MOS basics, Amplifier implementation using MOS, Filters, Comparators, Feedback, Compensation, Time constants, Biasing concepts, OpAmp circuits and applications, Bode plots

Bias generators, Bandgaps, Simulation verification, Cadence Virtuoso Spectre, ADCs, SPICE-based simulations, Analog Circuit Design, Power-management ICs, DRC LVS extraction, MOSFET physics, DACs, Silicon debug support, Driver amplifiers, DC-DC converters, Post-layout verification, Sensing circuits, Gate drivers, Error amplifiers, Charge pumps, LDOs, Level shifters, Analog Layout

C, Perl, Python, Tcl, mixed-signal circuit design, SPICE simulation, IC layout, verilog a, Analog Circuit Design

regulators , analog design fundamentals, Amplifiers, feedback control systems, references, DC-DC Converter design, power sequencing functions, analog IC design, low-power architectures, bias circuits

Schematic Design, MATLAB, Circuit Design, Stability Analysis, Cadence, Debug Analysis, Feedback Loops, Modeling, Design Reliability, Analog Design, Data Processing, Simulation