C, Pcie, Perl, Python, Tcl, UFS, HSIO PHY Controllers, Skill, Open Verification Methodology, USB2, systemverilog, MIPI, USB3, Universal Verification Methodology

Usb, Fpga, Pcie, Perl, Python, verification methodologies, Emulation, coverage driven verification, directed constrained-random tests, Uvm, systemverilog, MIPI, formal verification, AMBA, Test Bench, transaction level modeling, AXI4

Scripting Languages, Perl, Tcl, Physical Verification sign-off flows and tools, PDK concepts, Physical Design implementation flow, Fusion Compiler, Foundry PDKs, ICC2, SVRF rule decks, Calibre, Innovus, ICV, Design Rules, Mixed-signal SOC environments, Backend design methodologies, Tech LEF, Custom IC design flows, Layouts, ESD reliability analysis, PERC methodologies

Usb, Fpga, Perl, Pcie, Python, high performance industry standard IO interfaces, emulator software environments, coverage driven verification, directed constrained-random tests, Uvm, systemverilog, AMBA, MIPI, formal verification, test bench infrastructure, transaction level modeling, AXI4

code coverage , perl, Regression Testing, Ovm, Ethernet Protocols, Python, multiple RTL simulators, X-propagation, Uvm, systemverilog, functional coverage