Usb, Fpga, Soc Architecture, Pcie, Perl, Debugging, Python, verification methodologies, Emulation, coverage driven verification, directed constrained-random tests, Uvm, systemverilog, MIPI, AMBA, formal verification, Test Bench, transaction level modeling, AXI4

C, DDR, Pcie, Memory Consistency Models, verification components, Clock and Power Controllers, Caches, Coherency, Uvm, Security, systemverilog, Packet Processors, Hierarchies, standard verification methodology, LPDDR, Interconnect Protocols

code coverage , perl, Regression Testing, Ovm, Ethernet Protocols, Python, multiple RTL simulators, X-propagation, Uvm, systemverilog, functional coverage