Silicon Validation, protocol analyzers, logic analyzers, die-to-die communication, Oscilloscopes, silicon debug methodologies, UCIe PHY Adapter protocol stack, JTAG debuggers, BERTs, power-management flows, link initialization, firmware-controlled link initialization, high-speed serial or parallel interfaces, system-level debug, firmware-based validation, UCIe architecture, high-speed interface validation, end-to-end data transfer, training reliability mechanisms, automation scripts

protocol analyzer , Test Automation, Usb, Shell Scripting, Pcie, Ethernet, Sata, Python, Oscilloscope, Lab Bring-up Debug, DDR Validation, High-Speed Interface Testing, MIPI, HSIO Electrical Validation, BERT

Embedded C Programming, MIPS, Microcontrollers, System debugging skills, RISC-V, Embedded Systems, ARM Cortex M family, PCB schematics and layout, FPGAs

C, Windows, Linux, Python, ARM validation platform, SPDK, CPU GPU and system architectures, benchmarking tools, CineBench, FIO, PassMark, CoreMark, DPDK, PCMark, SPECCPU, SOC GPU Performance Validation, Post Silicon Validation lifecycle

C, Nvme, Soc Architecture, Spi, DDR, Linux, Pcie, Arm, Logic Analyzers, Debug, NAND testing, Oscilloscopes, embedded SW development, RISC micro-processor, Emulators

power supplies , C, I2c, Python, Labview, Automation of Equipment and Tests, scopes, SVI3, Relays, ATE programs, PMBUS, Computer to IC board communications, Basic circuits on bread board, SVID, Probes, SPMI, Power Chip Communication protocols, Validation related equipment, Load Slammer, FPGAs, Multi-meters, Debug of Power Management ICs, Bench Validation, Design PCBs, Analog switches

Java, Computer Networks, Software Development Lifecycle, Osi Layers, Python, Substation Automation, Agile Development Method, Protection and Communication Protocols