C, Makefile, Windows, Perl, Linux, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, graphics pipeline knowledge, acceleration HLS tools process, UVM testbenches, automating workflows in a distributed compute environment, developing UVM based verification frameworks, simulation profile efficiency improvement, debugging firmware and RTL code using simulation tools, TLM

Makefile, Windows, Perl, Linux, Verilog, Ruby, Systemc, C++, HLS tools, UVM testbenches, UVM based verification frameworks, TLM, Asic verification, Graphics pipeline knowledge, Simulation Tools, systemverilog