Rtl Design, high-speed interfaces, thermal monitoring integration, power management, clock-gating, systemverilog, embedded microcontroller integration, reset-domain architecture, micro-architecture

DDR, Pcie, Verilog, synthesis constraints, coherency memory subsystems, clock reset expertise, AMBA protocols, systemverilog, ECO flows, performance power analysis, Dft, ASIC RTL, cross-team collaboration, security blocks, low-power design, micro-architecture, SVA