Transistor Level Design, Layout parasitics, FinFET, Circuit Design, CMOS device physics, Standard cell libraries, IR analysis, Physical Design, GAA nanosheet architectures, Metal stacks, RTL-to-GDS, Spice, Characterization and verification of standard cells, Concurrent optimization

Tensorflow, Dsp, Pytorch, Keras, Gpu, Automation Framework Development, Shell Scripting, Python, TVM, ML Compiler Validation, Graph optimizations, Inference engines, Heterogeneous Compute Platforms, Performance Validation, AI Accelerators, MLIR, Deployment workflows, TensorRT, XLA, ONNX, CI CD validation environments, Glow, OpenVINO, AI Software Validation, ML Compiler architectures, NPU, SDK Validation