Hsm, Tls, Low-level embedded programming in C, Embedded systems software development, Secure Architectures, Automotive Cybersecurity, Embedded Operating Systems, Hardware Crypto accelerators, Secure update OTA, EVITA, ISO21434, Secure on-board communication, Scripting with Python, MACsec, Embedded processors and microcontroller architectures, TrustZone, Secure bootloader

Unix, Lsf, Jenkins, Git, Shell, Linux, Verilog, Gitlab, Python, Tcl, Synthesis, cdc, Simulation, RTL, make, systemverilog, RDC, UGE, LINT, Low Power, Slurm

Tensorflow, Pytorch, Linux, Python, CI CD pipelines

Pytorch, Tensorflow, Deep Learning, Linux Environment, Python Programming, machine learning fundamentals, large language models, Python Data Structures, GitLab CI CD infrastructure, Transformers

L2, L3, ACL, Embedded Software Development, routing algorithms, Qos, Debugging, data structures, Vxlan, performance bottlenecks, Go, memory leaks, control plane networking concepts, Linux operating systems, networking data plane forwarding concepts, microservices architecture, BCM based XGS DNX family of chipsets, MCT

pipelining , Ecos, Perl, Python, Tcl, Clock gating, Design DFT, UPF, Low-power design implementation, MCMM synthesis, Physical Synthesis, Multi-clock domain designs, STA timing closure, Netlist delivery, Power optimization flows, Synthesis methodologies, Timing Constraints, Timing constraints validation, formal verification

Svn, Git, Perl, Verilog, Python, Tcl, Synthesis, CHI, CXL.cache, Ace, Clocking Resets CDC, AMBA protocols, CXL.io, CXL.mem, systemverilog, Rtl Design, RDC, LINT, performance optimization, PCIe protocol architecture