Usb, Ethernet, I2c, MIL-STD-461 Testing, Requirements Capture and Traceability, Signal Integrity Analysis, Troubleshooting using engineering laboratory equipment, schematic capture, Digital Electronics Design, DDR3 Memory Interfaces, Timing Analysis, SERDES Interfaces, LVDS, DO-160 Testing, MIL-STD-810 Testing

Debugging, Functional coverage and assertions, Verification planning and execution, Automotive SoCs and MCUs, Emulation, Mixed-signal verification methodologies, FPGA prototyping and emulation platforms, UVM methodology, Formal verification techniques, Simulation, systemverilog

Sta, Scripting flow deployment for SoC Blocks, PG creation and push-down methodologies, Physical Verification, SoC RTL to GDSII implementation, Die file generation, SoC Full-chip floorplanning, RDL knowledge, Feed-through planning, Hierarchical design implementation, PnR implementation

synopsys primetime , Shell Scripting, Perl, Python, Tcl, Tempus, SI OCV AOCV POCV CDC, Setup Hold Analysis, StarRC, Timing Exceptions, Low-Power Timing Methodologies, Timing Convergence Techniques, Timing Signoff

Git, JIRA, Make-based build flows, silicon bring-up, Microcontrollers, architecture and development of firmware modules, bare-metal embedded firmware development, firmware debugging tools

Distributed Systems, Debugging, Python, MLops, Kubernetes, RAG systems, infrastructure automation, vector databases, containerisation, CI CD, scalable backend engineering, reliability engineering, AI orchestration platforms, agentic AI frameworks, Generative AI, LLM deployment, LLMOps, distributed training, cloud platforms, Monitoring, performance optimisation, AI system architecture, real-time inference systems, GPU optimisation

System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools