Matlab, Worst case identification, Process technologies, Monte Carlo analysis, Simulation verification, Block level topology selection, IC system partitioning, Physical layout management, AMs, Simulation on modern CAD tools, Analog Circuit Design, Architectural tradeoff analysis, Schematic generation, Routing tradeoffs, Spectre, Cadence tool set, Signal grounding, Top level simulation, Simplis, device physics, Post layout parasitic extraction, Die area optimization

Analog Circuit Design, Design Verification, Monte Carlo analysis, Modern CAD tools, Silicon validation and debug, Analog layouts, Simulation and Verification, Transistor level design flow, Schematic generation

Scripting, C, Verilog, Python, PCB design and layout software, Amplifiers, Signal integrity analysis, Noise reduction techniques, Analog Circuits Design, Transistor level circuit design, EMIR flows, Spice, Primesim, virtuoso, Reliability, Bias circuits