system integration, converter-level architecture, switching regulator circuits, DC-DC converters, Spectre, control-loop concepts, post-Silicon debug, analog mixed-signal IC design, extraction verification tools, design bring-up, Cadence Virtuoso, top-level analog simulations, high-voltage designs

Eda, Soc, quantus, Analytical Skills, TAT

temperature sensors , Dac, SoC Integration, PGA, DC-DC converters, Analog IC design, Architecture Design, Crystal Oscillators, Verification, ADC, Filters, Schematic Layout, LDO, bandgap reference, Debug, Comparators, Pll

Python, Perl, Spectre, transistor level simulations, writing automation scripts, XA, memory behavioral and physical models, memory design validation, Skill, Cadence schematic layout editor tools, EM IR analysis, XARA, transistor level circuit behavior and analysis, PrimeSim, running transistor level simulators, nWave, DFT Schemes and chip level integration, Hspice, development of memory macros, signal integrity analysis

Clarity 3D, thermal optimization, PowerSI, 2D 3D EM simulations, Cadence Allegro tools, Cadence Sigrity, ExtractIM, RLGC models, transmission line theory