SAP, Pro-e, Solid Works, ISO 20417, Iso 14971, Iso 13485, CAD, PMP Certifications, Jde, CAE tools, master control, DFSS, ISO 62304, Autocad, Msa, Six Sigma, ISO 15223-1

SAP, Pro-e, Solid Works, Msa, CAE tools, ISO 15223-1, DFSS, Jde, master control, CAD, ISO 62304, Six Sigma, Iso 13485, Iso 14971, Autocad, ISO 20417, PMP Certifications

Lighting calculations, Diesel generator sizing, Cathodic Protection, Grounding calculation, Review of Vendor drawings, Motors, Battery and charger sizing, Detail engineering documents, Switchgears, Emergency Diesel Generators, Transformer sizing, Local push button stations, Control cables, Transformers, HV and LV cable sizing, Sizing calculations, Panels, Plant Communication System, Key SLD DCD Relay metering proposal

astm standards , packaging engineering, Packaging Design, Creo, Autocad, Packaging Development, Sustainable Packaging Principles

Relay setting calculations, Microsoft Word, Eplan, Protection Single Line diagram schematics, SCADA RTU system, Telecom system FOTE PLCC, CT PT cables, Control cable philosophy, Auxiliary Relays, E3, Autocad, Protection IEDs

Tcl Scripting, Doors, Knowledge of Hardware Board and different components like ADC DAC Serial Memory, DO-254 development process, Electronics Electrical Engineering, Hardware system design knowledge of digital logic, RTL development using VHDL, FPGA verification developing Test case Test procedures Test bench debug and simulation using Modelsim Questasim, FPGA Synthesis Place and Route, Developing timing constraints solving CDC issues timing analysis and timing closures for FPGA, Requirement analysis and validation, Different bus protocols like I2C SPI QSPI UART AXI DDR3 4 PCIe JTAG, FPGA design tools like Libero

PCS, Ems, Autocad Electrical, Bms, cable sizing, global standards UL IEC IEEE NFPA, DC and AC power systems up to 1500 VDC 400–800 VAC MV, thermal system interaction, protection coordination, grounding, SolidWorks Electrical, Eplan, DigSilent, Etap

Doors, Tcl Scripting, FPGA Synthesis Place and Route, DO-254 development process, RTL development using VHDL, Hardware system design knowledge of digital logic, Different bus protocols like I2C SPI QSPI UART AXI DDR3 4 PCIe JTAG, FPGA verification developing Test case Test procedures Test bench debug and simulation using Modelsim Questasim, Developing timing constraints solving CDC issues timing analysis and timing closures for FPGA, FPGA design tools like Libero, Electronics Electrical Engineering, Knowledge of Hardware Board and different components like ADC DAC Serial Memory

Components such as switch gear used in panels, E-Plan, Panel Building and Wiring Skills, Basic principles of electrical electronics and computer engineering, Siemens PLC 1200 1500 series S7400 series, Autocad