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Hyderabad, India

Skills:

code coverage CShellVerilogDebuggingFlashPythonSystem VerilogPerlTclinterconnectMemoryUVM methodologyMicroprocessor architectureclocking system modespower managementSoC Verificationconstrained random methodologiesMetric Driven VerificationRomformal verification methodologiesAxiMRAMAHBRam

Early Applicant
Hyderabad, India

Skills:

MlTclPythonPerlregression managementsimulation coverage analysisAMS Co-SimulationUvmmixed-signal verificationsystemverilogAi

Early Applicant
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