System Verilog, MPHY, UFS, Unipro, Asic verification, Uvm

Usb, C, Pcie, Verilog, Networking Protocols, Ethernet, Python, high-speed interfaces, Palladium, systemverilog, emulation methodologies, Zebu, Protium

synopsys primetime , Static Timing Analysis, digital design principles, Constraints Manager, semiconductor fabrication processes, STA tools, Physical Design, Cadence Tempus

Jtag, Verilog, Debugging functional and toggle coverage, CHI, DFT concepts, System Level Testing, Uvm, systemverilog, Axi, lbist, APB, Predictive In Field Testing, MBIST

Verilog, Static timing analysis, Pcie, Timing closure methodologies, Synthesis, AMBA-AXI, systemverilog, Lint CDC RDC analysis, Power methodology development, Rtl Design

Cache, FPGA Design, Verilog, power analysis, Synthesis, Design Verification, memory compression, digital logic design principles, systemverilog, logic synthesis techniques, RTL design concepts, Dft, fabric coherence, DRAM, low-power design techniques

Verilog, System Verilog, Nvme, Pcie, DDR, scoreboard assertions, functional coverage coding, Uvm, AHB, code coverage analysis, Axi, RTL debugging