Scripting, Automation Tools, Verilog, Python, Perl, Automotive qualification, Uvm, Analog Circuit Design, systemverilog, DACs, ADC, Cadence, Formal verification methodologies, Op-Amps, ISO26262, Comparators

bandgap references , temperature sensors , Dll, Process Monitor, AI proficiency, Parasitic modeling, design validation, verification processes, Oscillators, Claude, agentic AI models, modeling and simulation, Comparators, Analog Test Mux, Charge Pumps, CMOS Amplifiers, LDOs, IO Buffers

Unix, C, Maven, Design Patterns, Oracle Database, PostgreSQL, Spring Boot, Multithreading, Database Design, Concurrent Programming, Java, Performance Tuning, Faircom, Shell Scripting, Git, Gradle, Linux, System Design, Rest Apis, Spring Framework, AI-enhanced developer IDEs, c-treeDB, Object-Oriented Design, AI assistants, SQL query optimization

Dsp, C, Software Integration, Zephyr, Android, Freertos, Linux, Firmware, middleware, Java, C++, Kernel, Gpu, modem, Python, system-level debugging, AI-assisted engineering tools, Performance Analysis, tracing, system profiling, Code Claude CLI, Claude, AI accelerator subsystems, debug tools, GitHub Copilot, MCP agents, platform software development, power management, Connectivity, PMIC, observability

Physical Design, Timing optimization and closure, Timing Closure, Physical verification and signoff checks, floorplanning, EDA tools for physical design verification, Low-power design methodologies, Package co-design, Static and Dynamic IR drop analysis, Power grid design, Placement and routing

caliber , power optimization , Sta, floor-planning, LVS, noise analysis, Innovus, Antenna, equivalence checks, Encounter, LEC, ICC, Physical Verification, primetime, ERC, DRC, partitioning, Placement, timing and functional ECOs, Crosstalk delay analysis, Clock Tree Synthesis

test validation , Schematic Design, Transmitter Design, RF Transceiver Design, VGA Design, ADC Design, PLL Clock System Design, Tape Out, Layout Design