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Showing 2 jobs
Skills:
boundary scan , Tcl, Vcs, System Verilog, Python, Perl, Logic Equivalency checking, TestMax, EDA Tools, Memory BIST, JTAG protocols, ATPG, Scan and BIST architectures, primetime, Gate level simulation debugging, Tessent tool sets, TetraMax
Skills:
Silicon Validation, Shell, Perl, Vcs, Mentor ETVerify, Dft, ATPG, Modelsim, MBIST, TestKompress
