Low-power Implementation, Physical Verification, Physical Design, Timing Closure, Floor Planning, EDA Tools, Power Grid Design, Power Planning

bandgaps, CMOS image sensors, Simulation, noise analysis, Pll, Dft, bias op-amps, transistor level circuit design, top chip integration, Verification, LDOs, tapeout, AI tools, ADC architectures, analog mixed signal design, SERDES, switched-cap circuits, Timing Analysis, Silicon Bring up, feedback and compensation techniques, TCAD, high-speed TX, CMOS pixel design techniques, transistor capacitor matching, mixed-signal chip design