Logic Design, Verilog, Microprocessors, low power design, LINT, cdc, Design Compiler, Memory controller designs, AMBA protocols, ASIC RTL Design, primetime, Synthesis, Axi, Asynchronous interface, APB, timing concepts for ASIC, RTL Coding, micro-architecture, Multi Clock designs, AHB, System-Verilog

Synthesis, primetime, RTL2GDS, Physical Design, EDA Tools, floorplanning, Synopsys Fusion Compiler, Cadence Innovus, Tempus

Linux, Sql, Python, Data Modeling, R

Golang, Apis, Prometheus, Pulumi, Grafana, Datadog, Bash Scripting, Docker, Terraform, Splunk, Kubernetes, Python, Crossplane, Google Cloud Operations, OpenTelemetry

Pcie, Version Control, Ethernet, RTL synthesis, Documentation, Timing Closure, verification processes, silicon bring-up, bare metal firmware development, SERDES, AI tools like Cursor

Hsm, PowerShell, Cryptography, SSL, Pki, Encryption, Rest Apis, Tls, Python, Microsoft ADCS, Keyfactor, PKCS standards, key management, OCSP, Thales Luna HSM, X.509 certificates, certificate lifecycle management, code-signing, CRL

Prometheus, Grafana, Datadog, Terraform, Splunk, Helm, Kubernetes, Python, AWS, GitOps, Go, ArgoCD

Autocad, Catia V5, Wiring harness design, regular expressions, ATIM, VeSyS2.0 wiring harness design tool, Wiring harness testing and inspection, Basic Python scripting, IPC-620 standard, CAD Tools, MENTOR TOOLS

security automation , Servicenow, Json, Iam, Siem, Rest Apis, Python, Email Security, Migrations, Vulnerability Management, Upgrades, Threat Intelligence, Palo Alto XSOAR, XDR, CrowdStrike, EDR, Splunk SOAR, Microsoft Security Technologies, SOAR Architecture, Platform Administration, Enterprise Deployments, SOAR Playbooks, Webhooks