specification , Unix, C, Linux, Perl, Python, System Verilog, Tcl, chip-level design, IC design, Cadence CAD Tools, RTL Coding, architecture, Verification, Synopsys

specification , Unix, C, Perl, Linux, System Verilog, Python, Tcl, chip-level design, IC design, RTL Coding, Cadence CAD Tools, architecture, Verification