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Sr. SILICON DESIGN ENGINEER : Post Silicon Memory Enablement

The Role

We are looking for a dynamic, energetic and a strong Enablement Engineer for Memory Enablement in Post silicon x86 environment, join our growing team.

The successful candidate will work as part of the post-silicon validation group, enablement of memory features including training/margining and memory subsystem implementation, working with engineering teams across AMD and with the vendor eco-system. Candidate will be immersed in challenging work, developing and executing enablement and feature test plans and reports throughout the execution to meet project milestones at POR quality. The candidate should be able to work in a global environment while maintaining a synergetic culture.  

As a key contribution to the success of AMD's product, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. In this role you will facilitate the enablement efforts of a program to ensure timely and qualitative completion of the milestones and adhere to the program commitments.

SKILL SET

4+ years of silicon validation for multiple any SoCs especially x86 containing multi core CPU/GPU subsystems with focus on memory technologies like DDR5/LPDDDR5
Good understanding of CPU subsystem in x86 / any SoC environment with Strong and Proven expertise in conducting tests and experiments towards enabling memory during Boot and Post -boot enablement
Good understanding of x86 HW, FW and BIOS Architecture
Strong understanding of Memory Subsystem including the Memory PHY and Controller understanding, various DDR/LPDDr topologies and configurations, and ecosystem collaboration
Strong communication and cross-functional collaboration abilities
Exposure to certain stages of Silicon Validation will be crucial, including use-case validation.
Practical experience of working on Processor based system designs is a plus
Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)
Hands-on experience dealing with Memory Analyzers

Key Responsibilities

Conducting day-to-day experiments for Memory enablement
Maintaining Test plans and reports and scrubbing the JIRA tickets on a periodic basis
Developing required test scripts for small tasks
Problem solving - the successful candidate loves debugging complex problems and has a track record of doing so 
Work with the Memory Lead and senior members in refining the processes, and demonstrate keen interest to learn and explore new methods/ideas pertaining to memory subsystem

Academic Credentials

Bachelors or Masters degree in computer engineering/Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available here.

This posting is for an existing vacancy.

Post Silicon Memory Enablement Engineer - DDR/LPDDR

Post Silicon Memory Enablement Engineer - DDR/LPDDR