simvision , Vcs, Verisium, Questa, waveform analysis, Uvm, formal verification tools, systemverilog, coverage-driven verification, Xcelium

Ovm, automation, Tcl Scripting, Verilog, Perl, GLS, Uvm, SV, RTL, SDF sim debug, Specman, test-bench development, HVL, functional and code coverages, closure constraint randomization, assertions development, eRM methodology, formal verification